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Power Measurements Under Nonsinusoidal Conditions : A Thesis in Electrical Engin

 

Power Measurements Under Nonsinusoidal Conditions : A Thesis in Electrical Engineering

 

Copyright 2015 Joseph Peter Klapatch

Published by Joseph Peter Klapatch at Shakespir

 

Submitted in Partial Fulfillment of the Requirements for the Degree of Master of Science in Electrical Engineering, January 1992. An original copy of this thesis with signatures is in the E.S. Farley Library at Wilkes University in Wilkes-Barre, Pennsylvania, United States of America.

 

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Abstract

A method is described for measuring real power in instances where voltage and current waveforms are not pure sinusoids. The measurement system utilizes digitized time domain samples of both waveforms. The waveforms are then transformed into the discrete frequency domain where both amplitude and phase information are derived.

This method can be used by electrical utility companies to survey harmonic content generated by loads in a power system. It also lends itself to applications of spectral analysis where in addition to amplitude information, phase information is also relevant.

 

Table of Contents

Abstract

 

Chapter 1 – Introduction

Chapter 2 – Specific Examples

Chapter 3 – Measurement of Power Dissipated by a Nonlinear Load

Chapter 4 – Conclusions

 

Appendix A – Simulation and Analysis of a Circuit with Nonsinusoidal Current and Voltage Waveforms

APPENDIX A.1 – FORTRAN SIMULATION OF A HALF-WAVE RECTIFIER IN A POWER SYSTEM

APPENDIX A.2 – FORTRAN SIMULATION OF A LOAD WITH HYSTERESIS IN A POWER SYSTEM

APPENDIX A.3 – FORTRAN SIMULATION OF SYNCHRONOUSLY SWITCHED LOAD IN A POWER SYSTEM

APPENDIX A.4 – FORTRAN FILE TRANSFER

Appendix B – Analog Data Acquisition Program

 

Bibliography

 

About the Author

 

Other works by this author

 

Social Media

 

Chapter 1 – Introduction

Most power measurement techniques used by electrical utility companies assume that the system current and voltage waveforms are pure sinusoids. While this assumption may be fairly accurate for low volume customers, there may be noticeable amounts of distortion on the lines of high volume customers, especially those customers that use electrical machinery.

A universally accepted method of measuring power is needed which addresses the presence of harmonics. It is not intended that the method described in this thesis be used to replace existing revenue meters, the most commonly used was developed by Schallenberger in 1888. This design has passed the test of time because it is inexpensive, reliable, and able to operate under many environmental conditions [1]. At this time the technology does not exist where Shallenberger inductive kilowatt hour meters can be replaced with more elaborate measurement schemes at a comparable cost. As one example, the described method could be used by an electrical utility company to survey their customers for a period of time to assess fees and penalties which reflect the amount of distortion created.

 

[1] Wolf, S.; Guide to Electronic Measurements and Laboratory Practice, Prentice-Hall, Englewood Cliffs, New Jersey, 1983

 

Recently, research has been conducted comparing responses of wattmeters and watthour meters to various distorted waveforms. The research of Filipski and Arseneau showed that the conventional inductive kilowatthour meter has poor frequency response beyond the operating frequency of the power system [2].

 

[2] Filipski, P.S.; Arseneau, R.; “Behavior of Wattmeters and Watthour Meters Under Distorted Waveform Conditions”, IEEE Tutorial Course – Nonsinusoidal Situations: Effects on the Performance of Meters and Definitions of Power, IEEE, New York, 1990

 

The method described is based on an approach discussed by Gunther [3]. His paper discusses a system in which the waveforms are synchronously sampled. In this thesis, analysis using synchronous sampling is demonstrated using mathematical models. Also demonstrated is an actual implementation of a system where samples are alternately taken from the current and voltage waveforms using a less expensive analog data acquisition circuit card.

 

[3] Gunther, E.W.; “Novel Instrumentation for Monitoring Power Flow in Non-Sinusoidal Situations”, IEEE Tutorial Course – Nonsinusoidal Situations: Effects on the Performance of Meters and Definitions of Power, IEEE, New York, 1990

 

TYPES OF DISTORTION

 

There are two basic types of distortion that can occur in a power system: harmonic and non-harmonic.

 

HARMONIC DISTORTION

 

Harmonic distortion can be caused by nonlinear loading effects, the most common of which is nonlinear magnetic properties of transformers, motors and other magnetic components. Other nonlinear loads include diodes and other devices where the resistance is not constant but rather a function of current flow or applied voltage.

Harmonic distortion is also caused by synchronously modulated loads. Such loads are switched on and off by a Silicon Controlled Rectifier (SCR), or similar device based on the instantaneous amplitude of the power system current or voltage waveform.

 

NON-HARMONIC DISTORTION

Non-harmonic distortion is caused by asynchronously modulated loads. Loads of this type are essentially switched on and off at a steady rate (usually at a much higher frequency than that of the power system) independent of power system synchronization. Examples include PWM (Pulse Width Modulated) Adjustable Speed Drives and Switching Power Supplies. Other contributors are electronic equipment such as television sets and computers. This topic is not further addressed in this thesis.

 

ANALYSIS OF NONSINUSOIDAL WAVEFORMS

 

The most commonly used method to evaluate the harmonic content of a periodic continuous time waveform is Fourier Analysis. The waveform, f(t) can be expressed as the sum of its frequency components as follows [4]:

 

[4] Hayt, W. H.; Kemmerly J. E.; Engineering Circuit Analysis, McGraw-Hill, New York, 1978

 

Where: f(t) is a periodic continuous time waveform and the Fourier coefficients are:

 

 

In equations (1) through (4), T is the period of the waveform, and the fundamental radian frequency, ω0 is expressed in equation (5).

 

 

DISCRETE FOURIER TRANSFORMS

 

Fourier Analysis can be performed numerically if the continuous time signal is replaced by a discrete time approximation. The frequency domain components can be determined from the time domain samples using Discrete Fourier Transforms (DFT) [5].

 

[5] Arrillaga, J.; Bradley, D.A.; Bodger P.S.; Power Systems Harmonics, John Wiley & Sons, New York, 1978

 

 

Where:

 

 

Algorithms were developed to calculate DFTs with less calculations. Conventional DFT algorithms require a quantity of NxN multiplications of complex numbers. If various redundant calculations are eliminated and the algorithm is structured in the form of “butterflies” rather than the multiplication of an NxN square matrix with an Nx1 matrix, calculation time can be greatly reduced. Such is referred to as Fast Fourier Transforms (FFT). In most cases, FFT algorithms require that N is a power of 2.

The frequency domain components of a DFT or FFT can be correlated to the continuous time signal frequency domain as follows:

 

 

Where:

 

 

The frequency term corresponding to N/2 is neglected because it is always real, therefore no phase related data can be derived at this frequency.

 

PURE SINUSOIDAL WAVEFORMS

 

A pure sinusoidal voltage waveform can be expressed as:

 

 

Where:

 

 

Likewise, a pure sinusoidal current waveform can be expressed as:

 

 

Where:

 

 

Throughout this discussion, real RMS power is defined as in [6]:

 

[6] Glover, J.D.; Sarma M.; Power System Analysis and Design, PWS-KENT, Boston, 1987

 

 

Power factor is defined as the ratio of real power to apparent power. In the case of a pure sinusoid, the power factor can be calculated using equation (13).

 

 

NONSINUSOIDAL WAVEFORMS

 

In cases where a periodic voltage waveform is not a pure sinusoid, the following expression is used:

 

 

Where:

 

 

Similarly,

 

 

NOTE:

 

 

When a periodic current waveform is not a pure sinusoid, it is expressed as:

 

 

Magnitudes and phases for harmonics in the current waveform are determined from the results of Fourier Analysis in the same manner as in the case of voltage.

Real power is defined as in [7]:

 

[7] Filipski, P.S.; Arseneau, R.; “Definition and Measurement of Apparent Power Under Distorted Waveform Conditions”, IEEE Tutorial Course – Nonsinusoidal Situations: Effects on the Performance of Meters and Definitions of Power, IEEE, New York, 1990

 

 

Where:

 

 

To include the DC components, equation (18) becomes equation (19).

 

 

Chapter 2 – Specific Examples

 

Half wave rectification is a simple example of nonlinear loading. Not only because the rectification device, in this example a semiconductor diode, conducts current in only one direction, but also when the diode is forward biased, current is an exponential function of applied voltage. Diode current, I can be approximated as [8]:

 

[8] Neudeck, G.W.; Modular Series on Solid State Devices Volume II, The PN Junction Diode, Addison-Wesley, Reading, Massachusetts, 1983

 

 

Where:

 

 

If T is assumed to be room temperature, then kT/q can be approximated as 0.026 Volts, and then equation (20) becomes:

 

 

Figure 1 Half-wave Rectifier Circuit

 

Take for example the circuit shown in Figure 1. The source provides a pure sinusoid. RLINE represents the internal resistance of the source and the line resistance between the source and the customer. The customer loads the system with a half-wave rectifier in series with 90 Ohms. For this example, the reactive properties of the distribution lines are not considered. This is to reduce the amount of variables in the example so that only the effects of the nonlinear load are represented in the results. No reactive components are included in the load for the same reason.

Instantaneous current, I for the circuit in Figure 1 is given by equation (22).

 

 

For this example, the results of equations (21) and (22) are equal. To perform this calculation an iterative technique must be used. First a value for vD must be assumed (in this example 0.4 Volts) and used in the two equations. If the two results are not equal, the result of equation (22) is used in equation (23) which is a form of equation (21).

 

 

The result of equation (23) is used in equations (21) and (22). If the results of equations (21) and (22) are not equal, the process is repeated. (NOTE: In this example, current flow is 0 Amperes if the instantaneous value of vS is less than the assumed minimum forward bias voltage of 0.5 Volts.)

The instantaneous values of current (I), load voltage (vLOAD), and diode voltage (vD) were calculated using 128 samples of vS, 2.8125 degrees apart. The resulting waveforms are shown in Figures 2 through 4.

 

Figure 2 Current Waveform in Half-wave Rectifier Circuit

 

Figure 3 VLOAD Waveform in Half-wave Rectifier Circuit

 

Figure 4 Diode Voltage Waveform in Half-wave Rectifier Circuit

 

The three waveforms are transformed into the frequency domain using IMSL subroutine FFTCF [9]. This routine performs an FFT on a waveform, and yields results in the same manner as equation (6). The results are used to approximate the continuous time frequency domain components using equations (7) through (9).

 

[9] IMSL Math Library, IMSL, Inc., Houston, Texas, 1987

 

Magnitudes and phases for each frequency component are calculated for the voltage waveforms using equations (15) and (16). A similar approach is used to calculate these values for the current waveform. Results for the DC component, and the ac components from the fundamental frequency to the ninth harmonic are shown in Table 1.

 

Table 1 Harmonic Content of Waveforms in Figures 2 through 4

 

FREQUENCY: DC

I (mA): 11.107

VLOAD (Volts): -0.1111

VD (Volts): -1.1107

 

FREQUENCY: FUNDAMENTAL

I (mA): 18.166 /-1.57 radians

VLOAD (Volts): 4.3183 /-1.57 radians

VD (Volts): 2.6834 /-1.57 radians

 

FREQUENCY: 2nd HARMONIC

I (mA): 9.1151 /3.14 radians

VLOAD (Volts): 0.0912 /0.00 radians

VD (Volts): 0.9115 /0.00 radians

 

FREQUENCY: 3rd HARMONIC

I (mA): 1.3094 /1.57 radians

VLOAD (Volts): 0.0130 /-1.57 radians

VD (Volts): 0.1309 /-1.57 radians

 

FREQUENCY: 4th HARMONIC

I (mA): 1.5674 /3.14 radians

VLOAD (Volts): 0.0157 /0.00 radians

VD (Volts): 0.1567 /0.00 radians

 

FREQUENCY: 5th HARMONIC

I (mA): 0.7147 /1.57 radians

VLOAD (Volts): 0.0072 /-1.57 radians

VD (Volts): 0.0715 /-1.57 radians

 

FREQUENCY: 6th HARMONIC

I (mA): 0.5202 /3.14 radians

VLOAD (Volts): 0.0052 /0.00 radians

VD (Volts): 0.0520 /0.00 radians

 

FREQUENCY: 7th HARMONIC

I (mA): 0.4554 /1.57 radians

VLOAD (Volts): 0.0046 /-1.57 radians

VD (Volts): 0.0455 /-1.57 radians

 

FREQUENCY: 8th HARMONIC

I (mA): 0.1887 /3.14 radians

VLOAD (Volts): 0.0019 /0.00 radians

VD (Volts): 0.0189 /0.00 radians

 

FREQUENCY: 9th HARMONIC

I (mA): 0.3079 /1.57 radians

VLOAD (Volts): 0.0031 /-1.57 radians

VD (Volts): 0.0307 /-1.57 radians

 

Note that Kirchoff’s Laws are obeyed for each harmonic.

 

 

Where:

 

 

Take for example the fundamental frequency. Using the information in Table 1 in equation (24) yields:

 

 

Using equation (12), it can be shown that the source supplies 40.87 mWRMS which is equal to power dissipated by the circuit as shown in Table 2. Power factors for each component are calculated using equation (13).

 

Table 2 Power Dissipation for Fundamental Frequency

 

LINE RESISTANCE

POWER (mW RMS): 1.65

POWER FACTOR: 1.0

 

DIODE

POWER (mW RMS): 24.37

POWER FACTOR: 1.0

 

LOAD RESISTANCE

POWER (mW RMS): 14.85

POWER FACTOR: 1.0

 

TOTAL

POWER (mW RMS): 40.87

POWER FACTOR: 1.0

 

For the DC component, vS is 0 Volts, and the source is assumed to be ideal having an internal resistance of 0 Ohms. (Resistance associated with the voltage source is included in RLINE.) The nonlinear component, the diode, acts like the source. The DC component obeys equation (24):

 

 

The net power in the circuit is shown in Table 3.

 

Table 3 Power Dissipation for DC Component

 

LINE RESISTANCE

POWER (mW): 1.23

 

DIODE

POWER (mW): -12.33

 

LOAD RESISTANCE

POWER (mW): 11.10

 

TOTAL

POWER (mW): 0

 

For the second harmonic, the circuit behaves much like it did in the dc case, where the diode acts like a source. Equation (24) is obeyed.

 

 

The power dissipation of the circuit for the second harmonic is shown in Table 4.

 

Table 4 Power Dissipation for Second Harmonic

 

LINE RESISTANCE

POWER (mW RMS): 0.41

POWER FACTOR 1.0

 

DIODE

POWER (mW RMS): -4.15

POWER FACTOR -1.0

 

LOAD RESISTANCE

POWER (mW RMS): 3.74

POWER FACTOR 1.0

 

TOTAL

POWER (mW RMS): 0

 

Note that the power factor for the diode is negative. To understand what is meant by a negative power factor, let us review power factors of pure sinusoids.

 

POWER FACTORS IN CASES OF PURE SINUSOIDS

 

When the load of a system is a purely resistive, the power factor is unity. A typical power waveform for a circuit operating at a unity power factor is shown in Figure 5. All instantaneous values of power are positive.

 

Figure 5 Power Waveform for Purely Resistive Load

 

When the load is comprised of both resistive and reactive elements, the power factor is less than 1, but greater than 0. A power waveform of this type is shown in Figure 6. Note that the time average value of power is positive. When the instantaneous value of power is positive, the instantaneous values of current and voltage are both of the same sign. During this time, resistive elements are dissipating energy, and the reactive elements are being energized. When the instantaneous value of power is negative, the instantaneous values of current and voltage are of opposite sign. The reactive elements of the circuit are deenergizing.

 

Figure 6 Power Waveform for a Resistive-Reactive Load

 

When the load is purely reactive, the power factor is 0. A power waveform of this type is shown in Figure 7. The average power is 0. During the positive half-cycle of the power waveform, the reactive circuit elements are being energized. During the negative half-cycle, the reactive elements are being deenergized.

 

Figure 7 Power Waveform for a Purely Reactive Load

 

NEGATIVE POWER FACTORS

 

If the time average value of the power waveform is negative, as shown in Figure 8, the load is putting more energy into the system than it is being supplied. This constitutes a source. As shown in the example, that is exactly what the nonlinear load is at the second harmonic.

 

Figure 8 Power Waveform in the Case of a Negative Power Factor

 

The power dissipated by the series combination of CR1 and RLOAD for the dc component and the ac components from the fundamental through the ninth harmonic are shown in Table 5. Note that for the DC component and all ac components other than the fundamental frequency (the operating frequency of the power system), the power dissipated by the series combination is negative. Therefore at all frequencies other than the fundamental, the nonlinear load behaves like a source.

 

Table 5 Power Dissipation at Load

 

FREQUENCY: DC

POWER (mW): -1.2337

 

FREQUENCY: FUNDAMENTAL

POWER (mW RMS): 39.2231

POWER FACTOR: 1.0

 

FREQUENCY: 2nd HARMONIC

POWER (mW RMS): -0.4154

POWER FACTOR: -1.0

 

FREQUENCY: 3rd HARMONIC

POWER (mW RMS): -0.0086

POWER FACTOR: -1.0

 

FREQUENCY: 4th HARMONIC

POWER (mW RMS): -0.0123

POWER FACTOR: -1.0

 

FREQUENCY: 5th HARMONIC

POWER (mW RMS): -0.0026

POWER FACTOR: -1.0

 

FREQUENCY: 6th HARMONIC

POWER (mW RMS): -0.0014

POWER FACTOR: -1.0

 

FREQUENCY: 7th HARMONIC

POWER (mW RMS): -0.0010

POWER FACTOR: -1.0

 

FREQUENCY: 8th HARMONIC

POWER (mW RMS): -0.0002

POWER FACTOR: -1.0

 

FREQUENCY: 9th HARMONIC

POWER (mW RMS): -0.0004

POWER FACTOR: -1.0

 

DISTORTION CAUSED BY HYSTERESIS

 

The most common type of nonlinearity in a power system is hysteresis. Magnetic components such as transformers and motors require current in the exciting winding to produce a magnetic field. This current is referred to as the exciting current. Due to the nonlinear properties of the magnetic core, the exciting current is nonsinusoidal.

In the case of an unloaded transformer, the exciting current is dominant in the circuit current waveform. Let us take for example the circuit shown in Figure 9. The magnetic core has nonlinear properties as shown in the hysteresis curve shown in Figure 10.

 

Figure 9 Circuit with Hysteresis

 

Figure 10 Hysteresis Loop for T1

 

In the magnetic core, the magnetic flux density, BC varies in time sinusoidally. Instantaneous values of magnetic field intensity HC are determined graphically from the hysteresis loop. Instantaneous exciting current values are determined by using values from the hysteresis curve in equation (25) [10].

 

[10] Fitzgerald, A.E.; Kingsley, C.; Umans, S.D.; Electric Machinery, McGraw-Hill, New York, 1983

 

 

Where:

 

 

With LC = 0.3 meters, and N = 1000 turns, the exciting current waveform is shown in Figure 11. Assuming that exciting current is the only current in the circuit, the voltage waveform on the primary of T1 can be approximated as shown in Figure 12.

 

Figure 11 Exciting Current Waveform

 

Figure 12 Primary Voltage Waveform

 

The waveforms in Figure 11 and Figure 12 are transformed into the frequency domain using IMSL subroutine FFTCF, as was done in the example of half-wave rectification. The results of the analysis for the fundamental frequency through the ninth harmonic are shown in Table 6. Note that since the hysteresis characteristics are symmetrical for both the positive and negative half cycles, there is no dc component or even harmonics present.

 

Table 6 Harmonic Content of Waveforms in Figures 11 and 12

 

FREQUENCY: FUNDAMENTAL

V PRIMARY (Volts): 4.4814 /0.007 radians

I (mA): 36.260 /-1.030 radians

 

FREQUENCY: 3rd HARMONIC

V PRIMARY (Volts): 0.0148 /-1.162 radians

I (mA): 14.831 /1.979 radians

 

FREQUENCY: 5th HARMONIC

V PRIMARY (Volts): 0.00514 /2.102 radians

I (mA): 5.141 /-1.039 radians

 

FREQUENCY: 7th HARMONIC

V PRIMARY (Volts): 0.00233 /-0.805 radians

I (mA): 2.334 /2.336 radians

 

FREQUENCY: 9th HARMONIC

V PRIMARY (Volts): 0.00151 /2.466 radians

I (mA): 1.507 /-0.677 radians

 

As in the case involving half-wave rectification, Kirchoff’s Laws are obeyed at all frequencies, and the power dissipated by the primary of T1 for all frequencies other than the fundamental is negative. (See Table 7.)

 

Table 7 Power Dissipation at Load

 

FREQUENCY: FUNDAMENTAL

POWER (mW RMS): 41.34167

POWER FACTOR: 0.508 lagging

 

FREQUENCY: 3rd HARMONIC

POWER (mW RMS): -0.10998

POWER FACTOR: -1.0

 

FREQUENCY: 5th HARMONIC

POWER (mW RMS): -0.01322

POWER FACTOR: -1.0

 

FREQUENCY: 7th HARMONIC

POWER (mW RMS): -0.00272

POWER FACTOR: -1.0

 

FREQUENCY: 9th HARMONIC

POWER (mW RMS): -0.00114

POWER FACTOR: -1.0

 

DISTORTION CAUSED BY SYNCHRONOUSLY SWITCHED LOADS

 

Distortion of this type is common in industrial environments where AC is converted to DC. In many cases the amplitude of the DC output of a converter is set by adjusting the duty cycle of the AC input. A basic one pulse converter is shown in Figure 13. SCR1 can be gated on when the amplitude of the power system voltage waveform reaches a given level and will remain on until it is reverse biased. The amplitude of the DC output of the converter is dependent upon the duration of time SCR1 is conducting.

 

Figure 13 Circuit with a Synchronously Switched Load

 

Let us assume that SCR1 in Figure 13 is gated on when the instantaneous amplitude of vS reaches 3.0 Volts. When SCR1 is on, it has the same current-voltage characteristics as CR1 in Figure 1. The waveforms for I, VLOAD, and VSCR are shown in Figures 14, 15 and 16 respectively. All three waveforms were transformed into the discrete frequency domain using IMSL subroutine FFTCF. The results were used to calculate the information shown in Table 8. The power dissipation data for the series combination of SCR1 and RLOAD is shown in Table 9.

 

Figure 14 Circuit Current Waveform

 

Figure 15 VLOAD Waveform

 

Figure 16 SCR Voltage Waveform

 

Table 8 Harmonic Content of Waveforms in Figures 14 through 16

 

FREQUENCY: DC

I (mA): 9.8521

VLOAD (Volts): -0.0985

VSCR (Volts): -0.9852

 

FREQUENCY: FUNDAMENTAL

I (mA): 17.0034 /-1.69 radians

VLOAD (Volts): 4.3313 /-1.57 radians

VSCR (Volts): 2.8206 /-1.49 radians

 

FREQUENCY: 2nd HARMONIC

I (mA): 10.4282 /2.93 radians

VLOAD (Volts): 0.1043 /-0.20 radians

VSCR (Volts): 1.0428 /-0.21 radians

 

FREQUENCY: 3rd HARMONIC

I (mA): 3.5787 /1.52 radians

VLOAD (Volts): 0.0358 /-1.62 radians

VSCR (Volts): 0.3579 /-1.62 radians

 

FREQUENCY: 4th HARMONIC

I (mA): 1.7076 /1.75 radians

VLOAD (Volts): 0.0171 /-1.39 radians

VSCR (Volts): 0.1708 /-1.39 radians

 

FREQUENCY: 5th HARMONIC

I (mA): 2.2463 /0.66 radians

VLOAD (Volts): 0.0225 /-2.48 radians

VSCR (Volts): 0.2246 /-2.48 radians

 

FREQUENCY: 6th HARMONIC

I (mA): 1.1659 /-0.33 radians

VLOAD (Volts): 0.0117 /2.81 radians

VSCR (Volts): 0.1166 /2.81 radians

 

FREQUENCY: 7th HARMONIC

I (mA): 1.1349 /-0.56 radians

VLOAD (Volts): 0.0135 /2.58 radians

VSCR (Volts): 0.1135 /2.58 radians

 

FREQUENCY: 8th HARMONIC

I (mA): 1.1894 /-1.62 radians

VLOAD (Volts): 0.0119 /1.52 radians

VSCR (Volts): 0.1189 /1.52 radians

 

FREQUENCY: 9th HARMONIC

I (mA): 0.7370 /-2.36 radians

VLOAD (Volts): 0.0074 /0.78 radians

VSCR (Volts): 0.0737 /0.78 radians

 

Table 9 Power Dissipation at Load

 

FREQUENCY: DC

POWER (mW): -0.9706

 

FREQUENCY: FUNDAMENTAL

POWER (mW RMS): 36.5141

POWER FACTOR: 0.99 LAGGING

 

FREQUENCY: 2nd HARMONIC

POWER (mW RMS): -0.5437

POWER FACTOR: -1.00

 

FREQUENCY: 3rd HARMONIC

POWER (mW RMS): -0.0640

POWER FACTOR: -1.00

 

FREQUENCY: 4th HARMONIC

POWER (mW RMS): -0.0146

POWER FACTOR: -1.00

 

FREQUENCY: 5th HARMONIC

POWER (mW RMS): -0.0252

POWER FACTOR: -1.00

 

FREQUENCY: 6th HARMONIC

POWER (mW RMS): -0.0067

POWER FACTOR: -1.00

 

FREQUENCY: 7th HARMONIC

POWER (mW RMS): -0.0064

POWER FACTOR: -1.00

 

FREQUENCY: 8th HARMONIC

POWER (mW RMS): -0.0071

POWER FACTOR: -1.00

 

FREQUENCY: 9th HARMONIC

POWER (mW RMS): -0.0027

POWER FACTOR: -1.00

 

As in the other examples, Kirchoff’s Laws are obeyed for all frequencies, and the power dissipated by the nonlinear load is negative at all frequencies except the fundamental.

 

Chapter 3 – Measurement of Power Dissipated by a Nonlinear Load

To measure power per the method simulated in the three examples, a National Instruments Lab-PC multifunction analog, digital, and timing input/output (I/O) board was installed in an expansion slot of an IBM 386 Personal Computer. The National Instruments board contains:

(1) 12-bit successive-approximation analog-to-digital converter (ADC) which is multiplexed from eight external analog inputs.

(2) 12-bit digital-to-analog converters (DACs) to provide two channels of analog output.

(24) lines (three 8-bit ports) of transistor-transistor logic (TTL) compatible digital I/O which can be interfaced to external digital circuitry.

(6) 16-bit counter/timer channels for timing I/O.

The National Instruments Lab-PC was chosen on the basis of price and versatility. While there are analog-to-digital (A to D) circuit cards available that are less expensive, the additional functions of digital-to-analog (D to A) conversion and digital I/O make the National Instruments Lab-PC a useful tool for various applications in an electronics laboratory.

 

INSTALLATION OF THE LAB-PC CIRCUIT CARD

 

Prior to the installation of the Lab-PC or any other circuit card, one must note the I/O addresses of existing circuitry. The base address of the Lab-PC should then be set using the Dual In-line Pin (DIP) switch as instructed in the manual in such a way that the I/O addresses on the Lab-PC are not the same as I/O addresses already being used by the computer, thus avoiding contention on the data lines.

In addition to address selection, positions of factory installed jumpers must be noted and changed if necessary. The configuration of the jumpers determine:

A. Direct Memory Access (DMA) Channel Selection. Sets which DMA channel is to be used if data is to be exchanged directly between the Lab-PC circuit card and the PC memory.

B. Interrupt selection. Determines which interrupt line on the PC interrupt bus is activated by interrupts generated by the Lab-PC circuit card.

C. Polarity of analog inputs. One jumper selects whether all eight analog inputs have a bipolar input range of -5.0 Volts to 4.9976 Volts, or a unipolar input range of 0.0 Volts to 9.9976 Volts.

D. Polarity of analog outputs. Each of the two analog outputs can be individually set for unipolar or bipolar operation over the same voltage range as the analog inputs.

 

LAB-PC I/O ADDRESS MAP

 

For the experiment performed, the base hexadecimal address was chosen to be 240H (576 decimal). With this setting, the I/O map for relevant ports used in analog data acquisition is shown in Table 10.

 

Table 10 Lab-PC I/O Address Map

 

ADDRESS (HEX): 240

ADDRESS (DECIMAL): 576

REGISTER NAME: COMMAND REGISTER 1

TYPE: WRITE

 

ADDRESS (HEX): 240

ADDRESS (DECIMAL): 576

REGISTER NAME: STATUS REGISTER

TYPE: READ

 

ADDRESS (HEX): 241

ADDRESS (DECIMAL): 577

REGISTER NAME: COMMAND REGISTER 2

TYPE: WRITE

 

ADDRESS (HEX): 242

ADDRESS (DECIMAL): 578

REGISTER NAME: COMMAND REGISTER 3

TYPE: WRITE

 

ADDRESS (HEX): 248

ADDRESS (DECIMAL): 584

REGISTER NAME: A/D CLEAR REGISTER

TYPE: WRITE

 

ADDRESS (HEX): 24A

ADDRESS (DECIMAL): 586

REGISTER NAME: DMATC INTERRUPT CLEAR

TYPE: WRITE

 

ADDRESS (HEX): 24A

ADDRESS (DECIMAL): 586

REGISTER NAME: A/D FIFO REGISTER

TYPE: READ

 

ADDRESS (HEX): 24C

ADDRESS (DECIMAL): 588

REGISTER NAME: TIMER INTERRUPT CLEAR

TYPE: WRITE

 

ADDRESS (HEX): 254

ADDRESS (DECIMAL): 596

REGISTER NAME: COUNTER A0 DATA

TYPE: READ & WRITE

 

ADDRESS (HEX): 255

ADDRESS (DECIMAL): 597

REGISTER NAME: COUNTER A1 DATA

TYPE: READ & WRITE

 

ADDRESS (HEX): 256

ADDRESS (DECIMAL): 598

REGISTER NAME: COUNTER A2 DATA

TYPE: READ & WRITE

 

ADDRESS (HEX): 257

ADDRESS (DECIMAL): 599

REGISTER NAME: COUNTER A MODE REGISTER

TYPE: WRITE

 

Regardless of the application to which the Lab-PC is to be used, the first three commands of an operation program must be I/O writes to Command Register 1, Command Register 2 and Command Register 3. This initializes operating parameters. Once initialized, the three registers are not to be written to, unless operation parameters are to be changed.

Command Register 1 holds information concerning analog data acquisition. Each bit in this register controls a specific function.

BIT 7 Scan enable. If this bit is set (binary 1), multi-channel scanning is enabled. If this bit is cleared (binary 0), analog-to-digital (A to D) conversion is performed on one channel only.

BITS 6-4 Analog input gain. Sets the gain of the Programmable Gain Amplifier, which amplifies the analog input signal before A to D conversion. All eight channels of analog input are set to the same gain. A 3-bit code corresponds to a specific gain. For example 000 sets all input channels for a gain of 1; 101 sets all input channels for a gain of 20.

BIT 3 Selects data coding format for the digital output of the ADC. If this bit is set, the output is two’s compliment. If this bit is cleared, the output is straight binary.

BITS 2-0 Selects which analog input channels are to be converted to digital. A 3-bit code corresponds to one of eight analog inputs. If multi-channel scanning is disabled by BIT 7, only the channel selected by BITS 2-0 is converted. If multi-channel scanning is enabled, first the analog sample on the channel selected by BITS 2-0 is converted, then the sample for the channel one less in number, and so on until Channel 0 is converted. Then the process begins again.

Bits 7 through 4 of Command Register 2 are used to set operating parameters for the DACs. Parameters concerning the ADC are as follows:

BIT 3 ADC clock source select. If this bit is cleared, Counter A0 which is driven by an internal 1 MHz clock is used as the ADC clock source. If this bit is set, Counter B0 which is driven by an internal 2 MHz clock is the ADC clock source.

BIT 2 Data acquisition operation enable (if Counter A0 is ADC clock source). If this bit is set, Counter A0 is enabled and data acquisition occurs. If this bit is cleared, Counter A0 is disabled unless overruled by a condition set forth by BIT 1 of this register.

BIT 1 External trigger enable. If this bit is set a low-to-high transition on the external trigger input will start data acquisition controlled by Counter A0. (BIT 2 and BIT 0 should be cleared.) If this bit is cleared the external trigger function is disabled.

BIT 0 Pretrigger enable. If this bit is set, data acquisition starts when BIT 2 is set, but the sample counter (Counter A1) does not start counting samples until a low-to-high transition occurs at the external trigger input. (BIT 1 should be cleared.)

Command Register 3 holds information concerning DMA operation and interrupts. Bits 7 and 6 of this register are “don’t care” bits. If bits 5 through 0 are cleared, the Lab-PC will not generate any interrupts or DMA requests.

After the Command Registers are initialized, the appropriate counter group (8253 System Timing Controller manufactured by Advanced Micro Devices, Inc.) should be initialized. Counter group A (based on an internal 1 MHz clock) is used for analog data acquisition to set the time between samples, and to limit the amount of samples taken. Counter group A can also be used by the DACs for waveform generation. Counter group B (based on an internal 2 MHz clock) can be used for data acquisition or other general timing.

Initialization of a counter group first involves setting the Counter Mode Register. The function of each bit of this register is as follows:

BITS 7-6 Address bits. Determines which counter in the counter group information in BITS 5-0 concern. For instance if 10 is written to BITS 7-6 of Counter A Mode Register, parameters for Counter A2 Data Register are initialized as specified in BITS 5-0.

BITS 5-4 Read/Load bits. Controls format of data to be written to the Counter Data Registers. For example, the 2-bit code 01 specifies Read/Load least significant byte only.

BITS 3-1 Mode. Selects one of six modes of operation for the Counter Data Register. Modes of operation include Programmable One-Shot and Rate Generator.

BIT 0 Data Format. If this bit is cleared, the input data for the selected register is to be Hexadecimal. If this bit is set the input data is to be Binary Coded Decimal (BCD).

After an I/O write to the Counter Mode Register, data shall be written to the Counter Data Register specified by bits 7-6 of the counter mode register. Additional I/O write statements to the Counter Mode Register followed by I/O write statements to a corresponding Counter Data Register can be made if needed.

On the I/O address map of the Lab-PC exist several write only registers that consist entirely of “don’t care” bits. A register of this type is used to trigger a particular function when an I/O write command at its address is given. Such registers include A/D Clear, DMATC Interrupt Clear and Timer Interrupt Clear.

The Status Register is a read only register at the same address as the write only Command Register 1. If interrupts or DMA are not used, the First In First Out (FIFO) register shall not be read until the Status Register indicates favorable conditions. Bits in this register give the following information.

BIT 7 Don’t care bit.

BIT 6 Indicates status of the external trigger. An external trigger sets this bit. It can be cleared by writing to the A/D Clear Register.

BIT 5 Analog conversion busy indicator. This bit is 1 while the ADC is performing a conversion, and 0 otherwise.

BIT 4 Status of DMA terminal count.

BIT 3 Status of interrupt caused by Counter A2.

BIT 2 FIFO Register overflow. If this bit is 1, a data overflow has occurred the FIFO. This is caused by the FIFO not being read fast enough to keep up with the data sent to the FIFO by the ADC.

BIT 1 ADC overrun. If this bit is 1, the ADC received a new start conversion command before the last conversion was completed.

BIT 0 Data available. If this bit is 1, there is data available in the FIFO to be read. After two consecutive readings of the FIFO, if there is no more data, this bit will be cleared.

When the Lab-PC is acquiring analog data, the digital output of the ADC is loaded into a FIFO and held there until it receives an I/O read command. The data is then transferred to the data bus of the PC. If interrupts or DMA are not used, the Status Register should be read before reading the FIFO register. [11]

 

[11] Lab-PC User Manual, National Instruments, Austin, Texas, 1991

 

PROGRAMMING FOR ANALOG DATA ACQUISITION

 

The original intended approach was to program in GWBasic, but because of the slow rate of command execution, this was not feasible. The problem became evident when the Status Register (I/O Address 240H) indicated a FIFO Register Overflow during data acquisition. The situation was remedied by translating the GWBasic program into a Quick Basic standalone executable command. A GWBasic program is executed line by line. The Quick Basic software package can take a Basic program (either generated within the Quick Basic software package, or another Basic software package), optimize and compile it into a single command executable through the system Disk Operating System (DOS).

The use of Quick Basic allowed the system to operate taking samples at intervals as short as 192 microseconds. This is in comparison to intervals of 1536 microseconds achieved with GWBasic. With the sampling interval achieved by use of Quick Basic, a single 60 Hz waveform can be sampled 64 times with a sampling interval of 260 microseconds.

If the Lab-PC is to acquire data in the scan mode from two analog channels, then each channel is sampled 32 times per cycle at a sampling interval of 520 microseconds. If 32 discrete time samples are converted to the discrete frequency domain using an FFT algorithm, analog frequency data can be derived for the waveform from the DC component up to and including the 15th harmonic. As demonstrated in the three examples in the previous chapter, this is an adequate amount of harmonics for our purposes.

In the event that more samples are necessary, smaller sample interval times can be obtained using the DMA channels of the Personal Computer. This can be done by initializing the DMA Controller of the Personal Computer in the part of the program where the command registers of the Lab-PC are initialized. The command registers must also be initialized to reflect the use of the DMA channel.

One instance where faster data acquisition is necessary is power measurement in a 60 Hz, 3-phase system. In a 3-phase situation, three sets of current samples and three sets of voltage samples are required. The harmonic content of each phase can then be analyzed.

Shorter sampling intervals are also required if the operating frequency of the power system is higher than 60 Hz. Such is the case in some military applications where 400 Hz is used.

 

ANALOG DATA ACQUISITION ON A POWER SYSTEM

 

To simulate a power system with harmonic distortion a circuit similar to that in Figure 1 was constructed and interfaced with a Personal Computer as shown in Figure 17. The voltage reading across RLOAD is scaled to represent the circuit current. The voltage across the series combination of CR1 and RLOAD and the voltage across RLOAD only are alternately sampled for one complete cycle. Thirty-two samples are taken for each waveform. The samples are then scaled and written to diskette for later use.

 

 

Figure 17 Half-wave Rectifier Circuit Interfaced with Lab-PC Circuit Card

 

VS is provided by a Hewlett Packard Function Generator set to deliver a 9.6 VPP sine wave at a frequency of approximately 60 Hz. The voltage waveform derived from the digitization of the signal at P1-1 is shown in Figure 18. The current waveform, shown in Figure 19 was obtained by scaling the voltage waveform at P1-2, treating RLOAD as an ammeter shunt resistor.

 

Figure 18 VLOAD Waveform with Sine Wave Input

 

Figure 19 Circuit Current Waveform with Sine Wave Input

 

With VS a triangular wave provided by the function generator, the voltage and current waveforms are shown in Figures 20 and 21 respectively.

 

Figure 20 VLOAD Waveform with Triangular Wave Input

 

Figure 21 Circuit Current Waveform with Triangular Wave Input

 

It should be noted that the position of the waveforms shown in Figures 19 through 21 was adjusted for presentation purposes. In the actual data acquisition process, the computer can begin taking samples at any time during the cycle. The phase at which sampling begins is reflected in the results of the FFT and subsequent processing. The random nature of the phase of the frequency components of the voltage and current waveforms has no effect in the calculation of Real Power since it is determined based on the difference in phase of the two waveforms at a particular frequency. Therefore, any single point in time can be used as a reference for phase.

 

PROCESSING OF ANALOG DATA

 

The files on diskette representing the current and voltage waveforms are transferred into a mainframe and analyzed in a similar method as were the waveforms simulated in the three examples in Chapter 2. The major difference in the method of analysis arises due to the manner in which the samples were obtained. In the three examples, the model depicts voltage and current waveforms being sampled at precisely the same instant. In the experiment, current and voltage samples are taken alternately, 260 microseconds apart. This would be of no concern if only amplitude information was necessary.

Because the Lab-PC sampling process starts scanning at the channel of highest number, and works downward in number, a sample representing current was taken first. The first sample representing voltage was taken 260 microseconds later. When the FFT of the voltage waveform is taken, the 260 microsecond delay is not considered. The phases of the harmonics contained in the voltage waveform are adjusted by using equation (26) in lieu of equation (16).

 

 

Where:

 

RESULTS OF SPECTRAL ANALYSIS

 

Fourier Analysis was performed on the waveforms shown in Figures 18 and 19 in the order the samples were taken (no adjustment for presentation purposes). The phases of the harmonics of the voltage waveform are calculated using equation (26) to compensate for the time between current and voltage samples. The results for the dc component and the ac components from the fundamental through the ninth harmonic are shown in Table 11. Likewise, the results of analysis of waveforms shown in Figures 20 and 21 are shown in Table 12. The power at each harmonic for sinusoidal VS is shown in Table 13, and for VS as a triangular waveform in Table 14.

 

Table 11 Harmonic Content of Waveforms in Figures 18 and 19

 

FREQUENCY: DC

I (mA): 12.0987

V LOAD (Volts): 0.1141

 

FREQUENCY: FUNDAMENTAL

I (mA): 18.5419 /0.502 radians

V LOAD (Volts): 4.6951 /0.404 radians

 

FREQUENCY: 2nd HARMONIC

I (mA): 6.9083 /1.006 radians

V LOAD (Volts): 0.4448 /-2.236 radians

 

FREQUENCY: 3rd HARMONIC

I (mA): 1.0687 /-1.656 radians

V LOAD (Volts): 0.1784 /-1.749 radians

 

FREQUENCY: 4th HARMONIC

I (mA): 2.0036 /-1.134 radians

V LOAD (Volts): 0.0992 /1.929 radians

 

FREQUENCY: 5th HARMONIC

I (mA): 0.0178 /2.574 radians

V LOAD (Volts): 0.0371 /-0.762 radians

 

FREQUENCY: 6th HARMONIC

I (mA): 0.6226 /3.047 radians

V LOAD (Volts): 0.0327 /-0.254 radians

 

FREQUENCY: 7th HARMONIC

I (mA): 0.1335 /0.202 radians

V LOAD (Volts): 0.0031 /-0.147 radians

 

FREQUENCY: 8th HARMONIC

I (mA): 0.3399 /0.868 radians

V LOAD (Volts): 0.0305 /-2.359 radians

 

FREQUENCY: 9th HARMONIC

I (mA): 0.1143 /-2.013 radians

V LOAD (Volts): 0.0104 /1.232 radians

 

Table 12 Harmonic Content of Waveforms in Figures 20 and 21

 

FREQUENCY: DC

I (mA): 7.4806

V LOAD (Volts): 0.2237

 

FREQUENCY: FUNDAMENTAL

I (mA): 12.0646 /-2.294 radians

V LOAD (Volts): 3.1667 /-2.390 radians

 

FREQUENCY: 2nd HARMONIC

I (mA): 5.9615 /1.692 radians

V LOAD (Volts): 0.3313 /-1.491 radians

 

FREQUENCY: 3rd HARMONIC

I (mA): 1.3138 /-0.609 radians

V LOAD (Volts): 0.3498 /-0.640 radians

 

FREQUENCY: 4th HARMONIC

I (mA): 0.0558 /-2.856 radians

V LOAD (Volts): 0.0189 /1.307 radians

 

FREQUENCY: 5th HARMONIC

I (mA): 0.5102 /1.094 radians

V LOAD (Volts): 0.1355 /1.087 radians

 

FREQUENCY: 6th HARMONIC

I (mA): 0.6132 /-1.221 radians

V LOAD (Volts): 0.0450 /1.921 radians

 

FREQUENCY: 7th HARMONIC

I (mA): 0.2065 /2.678 radians

V LOAD (Volts): 0.0721 /-3.563 radians

 

FREQUENCY: 8th HARMONIC

I (mA): 0.0328 /0.484 radians

V LOAD (Volts): 0.0031 /-2.554 radians

 

FREQUENCY: 9th HARMONIC

I (mA): 0.1783 /-1.785 radians

V LOAD (Volts): 3.603 /-1.704 radians

 

Table 13 Power Dissipation at Load with Sine Wave Input

 

FREQUENCY: DC

POWER (mW): 1.3809

 

FREQUENCY: FUNDAMENTAL

POWER (mW RMS): 43.3208

POWER FACTOR: 0.995 LEADING

 

FREQUENCY: 2nd HARMONIC

POWER (mW RMS): -1.5288

POWER FACTOR: -0.995

 

FREQUENCY: 3rd HARMONIC

POWER (mW RMS): 0.0095

POWER FACTOR: 0.996 LEADING

 

FREQUENCY: 4th HARMONIC

POWER (mW RMS): -0.0099

POWER FACTOR: -0.997

 

FREQUENCY: 5th HARMONIC

POWER (mW RMS): -0.0003

POWER FACTOR: -0.981

 

FREQUENCY: 6th HARMONIC

POWER (mW RMS): -0.0101

POWER FACTOR: -0.987

 

FREQUENCY: 7th HARMONIC

POWER (mW RMS): 0.0002

POWER FACTOR: 0.939 LEADING

 

FREQUENCY: 8th HARMONIC

POWER (mW RMS): -0.0052

POWER FACTOR: -0.996

 

FREQUENCY: 9th HARMONIC

POWER (mW RMS): -0.0006

POWER FACTOR: -0.995

 

Table 14 Power Dissipation at Load with Triangular Wave Input

 

FREQUENCY: DC

POWER (mW): 1.7487

 

FREQUENCY: FUNDAMENTAL

POWER (mW RMS): 19.0148

POWER FACTOR: 0.995 LEADING

 

FREQUENCY: 2nd HARMONIC

POWER (mW RMS): -0.9867

POWER FACTOR: -0.999

 

FREQUENCY: 3rd HARMONIC

POWER (mW RMS): 0.2297

POWER FACTOR: 0.999 LEADING

 

FREQUENCY: 4th HARMONIC

POWER (mW RMS): -0.0003

POWER FACTOR: -0.523

 

FREQUENCY: 5th HARMONIC

POWER (mW RMS): 0.0346

POWER FACTOR: 0.999 LEADING

 

FREQUENCY: 6th HARMONIC

POWER (mW RMS): -0.0138

POWER FACTOR: -0.999

 

FREQUENCY: 7th HARMONIC

POWER (mW RMS): 0.0074

POWER FACTOR: 0.999 LEADING

 

FREQUENCY: 8th HARMONIC

POWER (mW RMS): -0.0001

POWER FACTOR: -0.995

 

FREQUENCY: 9th HARMONIC

POWER (mW RMS): 0.0032

POWER FACTOR: 0.997 LAGGING

 

DISCUSSION OF RESULTS

 

Unlike the examples using mathematical models, in the case of the sinusoidal input, the power for all harmonics other than the operating frequency of the power system is not negative. This is because the physical source does not generate a pure sinusoid. As pointed out in the examples in Chapter 2, if the source is generating power at a particular frequency then the power dissipated by the load is positive (unless the load is causing more distortion at that frequency than the source is contributing). If on the other hand, nonlinearities in the load cause distortion, the load acts like a source for the associated frequencies, thus negative power dissipation. Therefore, this power measurement technique not only indicates real power dissipation at each harmonic, but also the direction of power flow.

The concept of direction of power flow can be better illustrated in the experiment using the triangular wave input. A triangular waveform is made up entirely of odd harmonics [12]. Note in Table 14, that at all the odd harmonics, the power dissipated by the series combination of the diode and resistor is positive. This is because the source is providing power at these frequencies. The power dissipated at all the even harmonics is negative due to the fact that the load is creating them.

 

[12] Spiegel, M. R.; Schaum’s outline Series Theory and Problems of Fourier Analysis, McGraw-Hill, New York, 1974

 

Chapter 4 – Conclusions

Most cases of distortion on power lines are caused by loading, either by the customer, or by transformers owned by the utility company. The method of power measurement explained in this thesis not only indicates the amount of distortion present, but also who is responsible for causing the distortion. If such a measurement scheme were implemented by a utility company, a customer would be penalized for those harmonics which have negative power dissipation (created by customer), and the utility company would take appropriate action for those harmonics (other than the fundamental) with positive power dissipation (created by utility company or other customers).

 

IMPLEMENTATION

 

Use of this method of power measurement in an actual power system requires precise interfaces. Isolation must be provided between the power system and the measurement system. The voltage, phase, and frequency characteristics of the interfaces must be taken into account before calculating power. This can be done after processing the FFT results by scaling the amplitude of the voltage and current harmonic components and adjusting phase in order to make the interfaces seem transparent.

The timing of the analog sampling is critical. Fourier Analysis Theory stipulates that the signal for a specific time interval must be exactly the same as the signal in all previous and future time intervals of equal duration. Ideally, in cases of harmonic distortion, if an N+1th sample is taken, it must be exactly the same value as the first sample. If this is not the case, calculations will indicate greater amplitudes at frequencies other than the fundamental, along with phase errors.

The sampling rate must be greater than twice the highest frequency present in the system as specified by Nyquist’s Theorem. If such a sampling rate cannot be achieved, the analog inputs must be band limited by the use of low pass filters. This is to avoid aliasing errors which in essence make frequency components above those that apply to Nyquist criteria appear in the results of the lower frequencies. It should also be noted that if a lowpass filter is used, its voltage, phase, and frequency characteristics must be considered in the same manner as other interfaces.

 

Appendix A – Simulation and Analysis of a Circuit with Nonsinusoidal Current and Voltage Waveforms

C FORTRAN PROGRAM TO SIMULATE THE EFFECT A NON-LINEAR LOAD ON A POWER SYSTEM

C

C VARIABLE DIRECTORY

C

C C(N)- COMPLEX ARRAY, DISCRETE TIME SAMPLES OF VOLTAGE WAVEFORM

C CCOEF(N)- COMPLEX ARRAY, RESULTS OF FFT PERFORMED ON ARRAY

C C(N) BY IMSL SUBROUTINE FFTCF

C CCOEJCOMPLEX ARRAY, COMPLEX CONJUGATE OF TERMS OF ARRAY

C CCOEF CORRESPONDING TO FOURIER TERMS (N/2)+1 THROUGH N-1

C CCOESCOMPLEX ARRAY, CCOEF + CCOEJ

C CIMREAL ARRAY, IMAGINARY TERMS OF COMPLEX ARRAY CCOES

C CMAG(Q)- REAL ARRAY, MAGNITUDE DERIVED FROM CONVERTING RECTANGULAR VECTOR CRL(Q)+jCIM(Q) INTO POLAR FORM

C CPHAS(Q)- REAL ARRAY, PHASE DERIVED FROM CONVERTING RECTANGULAR VECTOR CRL(Q)+jCIM(Q) INTO POLAR FORM

C CRL-REAL ARRAY, REAL TERMS OF COMPLEX ARRAY CCOES

C I – INTEGER, LOOP CONTROL VARIABLE

C J – INTEGER, LOOP CONTROL VARIABLE

C K – INTEGER, LOOP CONTROL VARIABLE

C M – INTEGER, LOOP CONTROL VARIABLE

C N – INTEGER, ARRAY SIZE FOR DISCRETE TIME SAMPLE

C ARRAYS, AND FFT COEFFICIENT ARRAYS

C P – INTEGER, LOOP CONTROL VARIABLE

C PF(Q)- REAL ARRAY, POWER FACTOR

C PFL(Q)- CHARACTER ARRAY, POWER FACTOR LEADING, LAGGING, UNITY, OR NEGATIVE

C PHDIF(Q)- REAL ARRAY, VPHASE(J) - CPHASE(J)

C POWER(Q)- REAL ARRAY, RMS POWER

C Q – INTEGER, ARRAY SIZE FOR RESULT ARRAYS

C V(N)- COMPLEX ARRAY, DISCRETE TIME SAMPLES OF VOLTAGE WAVEFORM

C VCOEF(N)- COMPLEX ARRAY, RESULTS OF FFT PERFORMED ON ARRAY V(N) BY IMSL SUBROUTINE FFTCF

C VCOEJ(N)- COMPLEX ARRAY, COMPLEX CONJUGATE OF TERMS OF ARRAY VCOEF(N) CORRESPONDING TO FOURIER TERMS (N/2)+1 THROUGH N-1

C VCOES(N)- COMPLEX ARRAY, VCOEF(J) + VCOEJ(N-J)

C VIM(Q)- REAL ARRAY, IMAGINARY TERMS OF COMPLEX ARRAY VCOES(N)

C VMAG(Q)- REAL ARRAY, MAGNITUDE DERIVED FROM CONVERTING RECTANGULAR VECTOR VRL(Q)+jVIM(Q) INTO POLAR FORM

C VPHAS(Q)- REAL ARRAY, PHASE DERIVED FROM CONVERTING RECTANGULAR VECTOR VRL(Q)+jVIM(Q) INTO POLAR FORM

C VRL(Q)- REAL ARRAY, REAL TERMS OF COMPLEX ARRAY VCOES(N)

C

C DECLARE VARIABLES

PARAMETER (N=128,Q=64)

COMPLEX V(N),VCOEF,VCOEJ,VCOES

COMPLEX C(N),CCOEF,CCOEJ,CCOES

REAL VRL,VIM,VMAG,VPHAS

REAL CRL,CIM,CMAG,CPHAS

REAL POWER,PHDIF,PF(Q)

INTEGER I,M,P,J,K

EXTERNAL FFTCF

CHARACTER*8 PFL

C DECLARE VARIABLES CONCERNING CIRCUIT SIMULATION OR FILE ACQUISITION, AND ACTUAL SIMULATION OR FILE TRANSFER

 

(SEE APPENDIX A.1 THROUGH A.4 FOR SPECIFIC EXAMPLES)

 

C CALL IMSL SUBROUTINE FFTCF

CALL FFTCF

CALL FFTCF

C PROCESS RESULTS OF IMSL SUBROUTINE

M=(N/2) 1

P=N

DO 40 I=1,M

J=I+1

C FIND COMPLEX CONJUGATES OF DISCRETE FOURIER TERMS (N/2)+1 THROUGH N-1

VCOEJ=CONJG)

CCOEJ=CONJG)

C ADD COMPLEX CONJUGATE TO DISCRETE FOURIER TERMS 1 THROUGH (N/2)-1

VCOES=VCOEJ+VCOEF

CCOES=CCOEJ+CCOEF

C SEPARATE COMPLEX NUMBERS INTO REAL AND IMAGINARY COMPONENTS

VRL=REAL)

CRL=REAL)

VIM=AIMAG)

CIM=AIMAG)

C CONVERT FROM RECTANGULAR TO POLAR

VMAG=(SQRT2)+(VIM2)))/N

VPHAS=ATAN2,VRL)

CMAG=(SQRT2)+(CIM2)))/N

CPHAS=ATAN2,CRL)

C CALCULATE PHASE DIFFERENCES BETWEEN VOLTAGE AND CURRENT COMPONENTS

PHDIF=VPHAS CPHAS

C DETERMINE WHETHER POWER FACTOR IS LEADING, LAGGING, OR UNITY

IF (PHDIF .GT. 0.) THEN

PFL=‘LAGGING

ELSE IF (PHDIF .LT. 0.) THEN

PFL=‘LEADING

ELSE

PFL=‘UNITY

ENDIF

C CALCULATE POWER FACTOR

PF(J)=COS)

C DETERMINE IF POWER FACTOR IS NEGATIVE

IF (PF(J) .LT. 0.) THEN

PFL=‘NEGATIVE

END IF

C CALCULATE REAL POWER FOR FUNDAMENTAL AND HARMONICS

POWER=VMAG*CMAG*PF(J)/2.

P=P 1

40 CONTINUE

J=0

C CALCULATE DC COMPONENTS OF CURRENT AND VOLTAGE WAVEFORMS

VMAG=REAL)/N

CMAG=REAL)/N

C CALCULATE POWER FOR DC COMPONENT

POWER=XMAG*YMAG

C PRINT MAGNITUDES AND PHASES OF CURRENT AND VOLTAGE WAVEFORMS

PRINT *,'DC COMPONENTS'

PRINT *,'APPLIED VOLTAGE',VMAG(1)

PRINT *,'CURRENT',CMAG(1)

PRINT *,' VOLTAGE & CURRENT'

PRINT *,'HARMONIC MAGNITUDE PHASE & MAGNITUDE PHASE'

DO 50 I=1,M

J=I+1

PRINT *,I,VMAG(J),VPHAS(J),CMAG(J),CPHAS(J)

50 CONTINUE

C PRINT REAL POWER FOR EACH HARMONIC

PRINT *,'DC POWER',POWER(1)

PRINT *,'HARMONIC POWER POWER FACTOR'

DO 60 I=1,M

J=I+1

PRINT *,I,POWER(J),PF(J),PFL(J)

60 CONTINUE

STOP

END

 

APPENDIX A.1 – FORTRAN SIMULATION OF A HALF-WAVE RECTIFIER IN A POWER SYSTEM

C FORTRAN SIMULATION OF A HALF-WAVE RECTIFIER IN A POWER SYSTEM

C

C VARIABLE DIRECTORY

C

C C(N)- SEE MAIN PROGRAM

C I – SEE MAIN PROGRAM

C J – SEE MAIN PROGRAM

C K – SEE MAIN PROGRAM

C N – SEE MAIN PROGRAM

C T – REAL, TIME

C V(N) – SEE MAIN PROGRAM

C VIDLREAL ARRAY, APPLIED VOLTAGE FROM IDEAL SOURCE

C VD(N) – REAL ARRAY, VOLTAGE DROP ACROSS DIODE

C

C DECLARE VARIABLES CONCERNING CIRCUIT SIMULATION

REAL VD(N),VIDL,T

C INITIALIZE VALUES

T=3.141592654*2/N

C SIMULATION OF CIRCUIT

DO 10 I=1,N

J=I 1

VIDL=4.5*(SIN)

C IF VOLTAGE APPLIED IS TOO LOW TO BIAS DIODE, THERE IS NO CURRENT FLOW, AND THE VOLTAGE APPLIED TO THE LOAD IS THE VOLTAGE OF THE IDEAL SOURCE

IF (VIDL .LT. 0.5) THEN

V(I)=VIDL

C(I)=0.

GOTO 5

END IF

C IF THE VOLTAGE OF THE IDEAL SOURCE IS 0.5 VOLTS OR GREATER, THE VOLTAGE ACROSS THE DIODE IS APPROXIMATED TO BE 0.4 VOLTS

VD(I)=0.4

C CURRENT AND DIODE VOLTAGE ARE CALCULATED ITTERATIVELY

DO 15 K=1,10

C(I)=(VIDL VD(I))/100.

VD(I)=0.026*ALOG)

15 CONTINUE

C VOLTAGE DROP DUE TO LINE RESISTANCE CONSIDERED

V(I)=VIDL (10.*C(I))

C PRINT DISCRETE TIME SAMPLES

5 PRINT *,V(I),C(I)

10 CONTINUE

 

APPENDIX A.2 – FORTRAN SIMULATION OF A LOAD WITH HYSTERESIS IN A POWER SYSTEM

C FORTRAN SIMULATION OF AN UNLOADED TRANSFORMER IN A POWER SYSTEM

C

C VARIABLE DIRECTORY

C

C C(N) – SEE MAIN PROGRAM

C I – SEE MAIN PROGRAM

C J – SEE MAIN PROGRAM

C N – SEE MAIN PROGRAM

C T – REAL, TIME

C V(N)- SEE MAIN PROGRAM

C VIDL(N)- REAL ARRAY, APPLIED VOLTAGE FROM IDEAL SOURCE

C

C DECLARE VARIABLES CONCERNING CIRCUIT SIMULATION

PARAMETER (N=64,Q=32)

REAL VIDL,T

C INITIALIZE VALUES

T=3.141592654*2/N

C SIMULATION OF CIRCUIT

DO 10 I=1,N

J=I 1

VIDL=4.5*(COS)

10 CONTINUE

C INPUT EACH DISCRETE CURRENT SAMPLE CALCULATED FROM HYSTERESIS LOOP

C(1)=0.0144

C(2)=0.0150

C(3)=0.0156

C(4)=0.0165

C(5)=0.0172

C(6)=0.0190

C(7)=0.0208

C(8)=0.0231

C(9)=0.0255

C(10)=0.0294

C(11)=0.0339

C(12)=0.0388

C(13)=0.0446

C(14)=0.0504

C(15)=0.0546

C(16)=0.0570

C(17)=0.0579

C(18)=0.0393

C(19)=0.0292

C(20)=0.0252

C(21)=0.0140

C(22)=0.0104

C(23)=0.0044

C(24)= 0.0010

C(25)= 0.0054

C(26)= 0.0076

C(27)= 0.0094

C(28)= 0.0108

C(29)= 0.0121

C(30)= 0.0128

C(31)= 0.0135

C(32)= 0.0140

C DUE TO THE SYMMETRICAL NATURE OF THE CURRENT WAVEFORM, THE REMAINING SAMPLES ARE OPPOSITE IN SIGN OF THE FIRST 32

DO 15 I=1,32

J=I+32

C(J)= C(I)

15 CONTINUE

C VOLTAGE DROP DUE TO LINE RESISTANCE IS CONSIDERED

DO 17 I=1,N

V(I)=VIDL (1.*C(I))

C PRINT INPUT DATA

PRINT *,V(I),C(I)

17 CONTINUE

 

APPENDIX A.3 – FORTRAN SIMULATION OF SYNCHRONOUSLY SWITCHED LOAD IN A POWER SYSTEM

C FORTRAN SIMULATION OF AN SCR SWITCHED ON AT 45 DEGREES IN A POWER SYSTEM

C

C VARIABLE DIRECTORY

C

C C(N)- SEE MAIN PROGRAM

C I – SEE MAIN PROGRAM

C J – SEE MAIN PROGRAM

C K – SEE MAIN PROGRAM

C N – SEE MAIN PROGRAM

C T – REAL, TIME

C V(N) – SEE MAIN PROGRAM

C VIDLREAL ARRAY, APPLIED VOLTAGE FROM IDEAL SOURCE

C VSCR(N)- REAL ARRAY, VOLTAGE DROP ACROSS SCR

C

C DECLARE VARIABLES CONCERNING CIRCUIT SIMULATION

REAL VSCR,VIDL,IA(N),T

C INITIALIZE VALUES

T=3.141592654*2/N

C SIMULATION OF CIRCUIT

DO 10 I=1,N

J=I 1

VIDL=4.5*(SIN)

C IF VOLTAGE APPLIED IS TOO LOW TO BIAS SCR, THERE IS NO CURRENT FLOW, AND THE VOLTAGE APPLIED TO THE LOAD IS THE VOLTAGE OF THE IDEAL SOURCE

IF (VIDL .LT. 0.5) THEN

V(I)=VIDL

C(I)=0.

GOTO 5

END IF

C IF SCR IN NOT YET GATED ON, THERE IS NO CURRENT FLOW, AND THE VOLTAGE APPLIED TO THE LOAD IS THE VOLTAGE OF THE IDEAL SOURCE

IF (J*T .LT. 0.785398) THEN

V(I)=VIDL

C(I)=0.

GOTO 5

END IF

C IF THE VOLTAGE OF THE IDEAL SOURCE IS 0.5 VOLTS OR GREATER, THE VOLTAGE ACROSS THE SCRIS APPROXIMATED TO BE 0.4 VOLTS

VSCR=0.4

C CURRENT AND SCR VOLTAGE ARE CALCULATED ITTERATIVELY

DO 15 K=1,10

C(I)=(VIDL VSCR)/100.

VSCR=0.026*ALOG)

15 CONTINUE

C VOLTAGE DROP DUE TO LINE RESISTANCE CONSIDERED

V(I)=VIDL (10.*C(I))

C PRINT DISCRETE TIME SAMPLES

5 PRINT *,V(I),C(I)

10 CONTINUE

 

APPENDIX A.4 – FORTRAN FILE TRANSFER

C FORTRAN CODE TO RETRIEVE ANALOG SAMPLES ACQUIRED BY

C LAB PC

C

C VARIABLE DIRECTORY

C

C C(N) – SEE MAIN PROGRAM

C I – SEE MAIN PROGRAM

C N – SEE MAIN PROGRAM

C V(N) – SEE MAIN PROGRAM

C

C READ DATA FROM CURRENT FILE

OPEN

DO 1 I=1,64

READ C(I)

1 CONTINUE

C READ DATA FROM VOLTAGE FILE

OPEN

DO 2 I=1,64

READ V(I)

2 CONTINUE

DO 10 I=1,N

C PRINT DISCRETE TIME SAMPLES

PRINT *,V(I),C(I)

10 CONTINUE

 

NOTE: BECAUSE SAMPLES ARE NOT TAKEN SIMULTANEOUSLY, THE FOLLOWING CHANGE MUST BE MADE IN THE MAIN PROGRAM FOR THIS CASE:

 

CHANGE

FROM: VPHAS=ATAN2,VRL)

 

TO: VPHAS=ATAN2,VRL) – (3.141592654*J/N)

 

Appendix B – Analog Data Acquisition Program

10 ‘ ANALOG DATA ACQUISITION PROGRAM

20 ‘ USING NATIONAL INSTRUMENTS LAB-PC CIRCUIT CARD

30 ‘ WITH DIP SWITCHES SET FOR BASE ADDRESS OF 240H

40 ‘

50 ‘ PREPARED IN GWBASIC

60 ‘ CONVERTED TO EXECUTABLE FILE USING QUICK BASIC 4.1

70 ‘

80 ‘ VARIABLE DIRECTORY

90 ‘ ARRAYS

100 ‘ A(32) – LOW BYTE OF CURRENT SAMPLE

110 ‘ B(32) – HIGH BYTE OF CURRENT SAMPLE

120 ‘ C(32) – LOW BYTE OF VOLTAGE SAMPLE

130 ‘ CURCURRENT SAMPLE TO BE WRITTEN TO FILE

140 ‘ D(32) – HIGH BYTE OF VOLTAGE SAMPLE

150 ‘ V(32) – VOLTAGE SAMPLE TO BE WRITTEN TO FILE

160 ‘ SINGLE VARIABLES

170 ‘ I – LOOP CONTROL VARIABLE

180 ‘ J – LOOP CONTROL VARIABLE

190 ‘ N – LOOP CONTROL VARIABLE

200 ‘ S – STATUS REGISTER CONTENTS

210 ‘ X – DUMMY VARIABLE USED TO CLEAR FIFO REGISTER

220 ‘

230 ‘

240 ‘ DIMENSION ARRAYS

250 DIM A(32), B(32),C(32),D(32),V(32),CUR

260 ‘ INITIALIZE COMMAND REGISTER TO 81H

270 ‘ ENABLE SCAN

280 ‘ ANALOG INPUT GAIN OF 1

290 ‘ OUTPUT IN STRAIGHT BINARY FORMAT

300 ‘ TWO ANALOG INPUTS ARE SCANNED

310 OUT 576,129

320 ‘ INITIALIZE COMMAND REGISTER 2 TO 0H

330 ‘ D TO A OUTPUTS ARE NOT USED

340 ‘ EXTERNAL TRIGGERS ARE NOT USED

350 OUT 577,0

360 ‘ INITIALIZE COMMAND REGISTER 3 TO 0H

370 ‘ DMA CHANNEL IS NOT USED

380 ‘ INTERRUPTS ARE NOT USED

390 OUT 578,0

400 ‘ INITIALIZE A0 TO 104H

410 ‘ SET SAMPLING INTERVAL OF 260 (104H) MICROSECONDS

420 OUT 599,52

430 OUT 596,4

440 OUT 596,1

450 ‘ INITIALIZE A1 TO 40H

460 ‘ SET NUMBER OF SAMPLES TAKEN TO 64 (40H)

470 OUT 599,112

480 OUT 597,64

490 OUT 597,0

500 ‘ CLEAR FIFO REGISTER

510 ‘ WRITE TO FIFO CLEAR REGISTER

520 OUT 584,0

530 ‘ PERFORM TWO CONSECUTIVE FIFO READS

540 X=INP

550 X=INP

560 ‘ SET SWTRIG BIT IN COMMAND REGISTER 2

570 ‘ TO BEGIN DATA ACQUISITION

580 OUT 577,4

590 ‘ ANALOG DATA ACQUISITION

600 FOR N=1 TO 32

610 ‘ READ STATUS REGISTER

620 ‘ IF STATUS REGISTER INDICATES 161 (A1H), DATA IS READY

630 ‘ IF 160 (A0H) IS INDICATED, THERE IS NO DATA IN THE

640 ‘ FIFO, THEREFORE THE STATUS REGISTER MUST BE READ AGAIN

650 ‘ UNTIL THERE IS A DATA READY INDICATION.

660 S=INP

670 IF S=160 GOTO 660

680 ‘ ACQUIRE CURRENT RELATED SAMPLE

690 A(N)=INP

700 B(N)=INP

710 ‘ READ STATUS REGISTER

720 S=INP

730 IF S=160 GOTO 720

740 ‘ ACQUIRE VOLTAGE RELATED SAMPLE

750 C(N)=INP

760 D(N)=INP

770 NEXT N

780 FOR I= 1 TO 32

790 ‘ CALCULATE CURRENT DERRIVED FROM VOLTAGE ACROSS 100 OHM

800 ‘ RESISTOR

810 CUR=(10*((256*B(I)+A(I))/4096) 5)/100

820 V(I)=10*((256*D(I)+C(I))/4096) 5

830 NEXT I

840 ‘ WRITE CURRENT SAMPLES TO DISKETTE IN DRIVE A

850 OPEN “A:CURRENT.DAT” FOR OUTPUT AS #1 LEN=64

860 FOR J=1 TO 32

870 WRITE #1,CUR

880 NEXT J

890 CLOSE

900 ‘ WRITE VOLTAGE SAMPLES TO DISKETTE IN DRIVE A

910 OPEN “A:VOLTAGE.DAT” FOR OUTPUT AS #1 LEN=64

920 FOR J=1 TO 32

930 WRITE #1,V(J)

940 NEXT J

950 CLOSE

960 END

 

Bibliography

[1] Wolf, S.; Guide to Electronic Measurements and Laboratory Practice, Prentice-Hall, Englewood Cliffs, New Jersey, 1983

[2] Filipski, P.S.; Arseneau, R.; “Behavior of Wattmeters and Watthour Meters Under Distorted Waveform Conditions”, IEEE Tutorial Course – Nonsinusoidal Situations: Effects on the Performance of Meters and Definitions of Power, IEEE, New York, 1990

[3] Gunther, E.W.; “Novel Instrumentation for Monitoring Power Flow in Non-Sinusoidal Situations”, IEEE Tutorial Course – Nonsinusoidal Situations: Effects on the Performance of Meters and Definitions of Power, IEEE, New York, 1990

[4] Hayt, W. H.; Kemmerly J. E.; Engineering Circuit Analysis, McGraw-Hill, New York, 1978

[5] Arrillaga, J.; Bradley, D.A.; Bodger P.S.; Power Systems Harmonics, John Wiley & Sons, New York, 1978

[6] Glover, J.D.; Sarma M.; Power System Analysis and Design, PWS-KENT, Boston, 1987

[7] Filipski, P.S.; Arseneau, R.; “Definition and Measurement of Apparent Power Under Distorted Waveform Conditions”, IEEE Tutorial Course – Nonsinusoidal Situations: Effects on the Performance of Meters and Definitions of Power, IEEE, New York, 1990

[8] Neudeck, G.W.; Modular Series on Solid State Devices Volume II, The PN Junction Diode, Addison-Wesley, Reading, Massachusetts, 1983

[9] IMSL Math Library, IMSL, Inc., Houston, Texas, 1987

[10] Fitzgerald, A.E.; Kingsley, C.; Umans, S.D.; Electric Machinery, McGraw-Hill, New York, 1983

[11] Lab-PC User Manual, National Instruments, Austin, Texas, 1991

[12] Spiegel, M. R.; Schaum’s outline Series Theory and Problems of Fourier Analysis, McGraw-Hill, New York, 1974

About the Author

 

Joseph Peter Klapatch completed the Electronics Technology program at the Lackawanna County Area Vocational Technical School – North Center, Mayfield, PA. He is a graduate of Mid-Valley High School, Throop, PA. He holds a Bachelor of Science degree in Electrical Engineering from Pennsylvania State University, and a Master of Science degree in Electrical Engineering from Wilkes University. He wrote this thesis in 1991 while enrolled as a part-time student at Wilkes University. At the time he was employed at Loral Control Systems, Archbald, PA; and later at Laurstan, Inc., Carbondale, PA.

He currently resides in New Jersey with his wife, Margaret and their five children. He is employed as a General Engineer at the William J. Hughes Technical Center at the Atlantic City International Airport.

 

Other works by this author

The Old School : The Mid-Valley Elementary School in Olyphant, Pennsylvania

eBook, December 2015

ISBN: 9781310503733

 

The Old School : The Mid-Valley Elementary School in Olyphant, Pennsylvania

Print Book, First Edition: May 2015 (perfect bound, alk. paper, black and white images)

ISBN: 9781633187276

United States Library of Congress Control Number (LCCN): 2015907858

WorldCat Online Computer Library Center (OCLC) Number: 913959570

 

Power Measurements under Nonsinusoidal Conditions : A Thesis in Electrical Engineering

Print Book, First Print-on-demand Edition: June 2015 (perfect bound, alk. paper)

ISBN: 9781633187887

 

Power Measurements under Nonsinusoidal Conditions : A Thesis in Electrical Engineering

Thesis/dissertation, Manuscript: 1992

WorldCat Online Computer Library Center (OCLC) Number: 25533223

 

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Power Measurements Under Nonsinusoidal Conditions : A Thesis in Electrical Engin

This thesis was written in 1991 in partial fulfillment of the requirements for a Master of Science degree in Electrical Engineering at Wilkes University, Wilkes-Barre, Pennsylvania, United States. The measurement method discussed can be used to determine if the distortion is from the source, or caused by the load. Abstract A method is described for measuring real power in instances where voltage and current waveforms are not pure sinusoids. The measurement system utilizes digitized time domain samples of both waveforms. The waveforms are then transformed into the discrete frequency domain where both amplitude and phase information are derived. This method can be used by electrical utility companies to survey harmonic content generated by loads in a power system. It also lends itself to applications of spectral analysis where in addition to amplitude information, phase information is also relevant.

  • Author: Joseph Peter Klapatch
  • Published: 2015-12-16 02:05:13
  • Words: 10092
Power Measurements Under Nonsinusoidal Conditions : A Thesis in Electrical Engin Power Measurements Under Nonsinusoidal Conditions : A Thesis in Electrical Engin